The present invention relates to a method for fabricating a region to isolate devices in a semiconductor substrate. More precisely, it involves fabricating isolation grooves that are filled with an insulating layer and polycrystalline semiconductor material. An isolation region fabricated by the method of the present invention has neither a "bird's beak" nor a "bird's head". Thus, a smooth surface is provided, which is preferable for multi-layered wiring in large scale integrated circuits (LSI).
In an integrated circuit (IC), many devices are formed on the same semiconductor substrate, and it is necessary to isolate these devices from each other. Isolation regions are therefore fabricated between the devices to isolate them from each other. Formerly isolation by a p-n junction was widely used, but the capacitance inherently included in the p-n junction decreased the speed of the circuit. As a result, dielectric isolation has become prevalent in recent ICs owing to its merits of low parasitic capacitance and high circuit performance.
Among dielectric isolation technologies, isolation with oxide and polycrystalline silicon (IOP) technology is widely used for bipolar ICs. This provides isolation grooves by etching between the devices and then filling the grooves with a layer of silicon dioxide (SiO.sub.2) and polycrystalline silicon (polysilicon).
In the early IOP technology, a wet etching process was used and the cross-section of the isolation groove was V-shaped. This is due to the difference in etching rate depending on the direction of the crystal axis of the substrate. It recently became possible to make a groove having a U-shaped cross-section, by applying a dry etching technique.
This U-shaped groove is more preferable than the V-shaped groove because, for the U-shaped groove, the width of the groove can be made narrower compared to the V-shaped groove, for the same groove depth. Also, it can provide higher packing intensity of devices on an IC die. Therefore, the U-shaped isolation groove has recently become widely used.
However, for device isolation by a U-shaped groove, there are certain known defects which prevent high packing density of devices. These defects associated with a conventional process will now be explained, with respect to an example.
FIGS. 1, 2, 3 and 4 are schematic cross-sectional views of a process for fabricating U-shaped isolation regions in a semiconductor substrate by a known technology. FIG. 1 shows a silicon substrate 1 made of p-type silicon, and n.sup.+ - and n-type silicon single-crystal layers 2 and 3, respectively, formed on the substrate 1 by diffusion and epitaxial growth technology.
On the surface of the n-type silicon layer 3, films of silicon dioxide (SiO.sub.2) 4 and silicon nitride (Si.sub.3 N.sub.4) 5 are formed successively. The SiO.sub.2 film 4 protects the silicon layer 3 from flaws. By photolithographic etching, a window corresponding to a groove to be formed at a position 6 is provided in the silicon nitride film 5. Then, using the remaining film 5 of silicon nitride as a mask, the U-shaped groove is formed in the layers 2, 3 and in the substrate 1 at the position 6 by dry etching. Reactive ion etching is preferable for making a sharp U-shaped groove. The reactive ion etching will be described hereinafter. The remaining n.sup.+ -layer 2 and the n-layer 3 of silicon are isolated by the grooves at the position 6. In subsequent processing the n.sup.+ -layer 2 becomes a buried layer for a bipolar element, and the n-layer 3 becomes a zone in which the base and emitter are fabricated.
Next, as shown in FIG. 2, the surface of the substrate is oxidized, and the inner surface of the U-shaped groove at the position 6 is coated by a thin layer 7 of SiO.sub.2. A layer of polysilicon (not shown) is then grown on the surface of the substrate. By this layer of polysilicon the groove is completely buried. Unwanted polysilicon on the surface of the substrate (not shown) is removed by polishing or etching, leaving the buried polysilicon 8 as shown in FIG. 2. By this etching process, the buried polysilicon 8 in the groove is slightly over-etched and leaves a depression as illustrated.
The substrate is then treated with a high temperature in the range of about 1000.degree. to 1100.degree. C. for a few hours. The upper part of the polysilicon 8 is thusly oxidized to form a SiO.sub.2 layer 9 of about 1 micron thickness. By this oxidation the volume of polysilicon increases about a factor of two, and the concave surface of the polysilicon 8 heaves to form a convex projection as shown in FIG. 3.
The reason for making such a thick oxide layer 9 on the upper part of the U-shaped isolation groove at the position 6 is to realize a so-called "walled base" and "walled emitter" in the bipolar IC circuit. The thick oxide layer of this isolation region limits the length of the base and emitter, thus providing the base and emitter by a self-aligning method. The walled base and walled emitter will be described hereinafter. Another reason to provide the thick oxide layer is to decrease the stray capacitance of a wiring layer which is formed on the surface of this oxide layer.
FIG. 4 shows schematically a configuration of a walled base. The films of silicon nitride 5 in FIG, 3 are removed using boiling phosphoric acid (H.sub.3 PO.sub.4), and the silicon dioxide 4 is removed by photolithography, exposing the base area 10. In this case the left hand side of the base area 10 is limited by the isolation region, so that the alignment of the mask for the base opening is not critical. In other words, it is self-aligned and the mask can extend onto the isolation region, such as to the point H' in FIG. 3. If the oxide layer 9 is sufficiently thick, it prevents the etching from exposing the buried polysilicon 8 at point C in FIG. 4. The emitter can also be self-aligned in the same manner at the left side of the base area 10. It is not shown in the figures for the sake of simplicity.
However, growing such a thick oxide layer 9 inherently produces a "bird's beak" B and a "bird's head" H as shown in FIG. 3. The bird's beak B is a thickened portion of the SiO.sub.2 film that grows under the silicon nitride film 5, and the bird's head H is a SiO.sub.2 film grown at the periphery of the groove which is heaved up by the oxidation of silicon at the side wall of the groove. The thicker the oxide layer 9 is grown, the larger they become.
Occasionally such a bird's head is heaved up to 0.8 microns and a bird's beak spreads to 1.5 micron. A bid's head increases the unevenness of the substrate surface, and makes it difficult to provide a multi-layered wiring on the surface. A bird's beak spreads laterally on the surface of the substrate, and decreases the packing density of devices, as a result of increasing the width of the isolation region between devices. Thus, all the effort to provide a sharp and narrow U-shaped isolation groove is counteracted to a great extent.